Servo Sweep Success

Servo Sweep/build/esp-idf/esp_system/CMakeFiles/sections.ld-d65dc84.bat

@@ -0,0 +1,9 @@
+@echo off
+cd /D "C:\Users\famil\COMPUTER\Owen\ESPmicrocontroller\Servo Sweep\build\esp-idf\esp_system" || (set FAIL_LINE=2& goto :ABORT)
+C:\Users\famil\.espressif\python_env\idf5.4_py3.11_env\Scripts\python.exe C:/Users/famil/esp/v5.4/esp-idf/tools/ldgen/ldgen.py --config "C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/sdkconfig" --fragments-list C:/Users/famil/esp/v5.4/esp-idf/components/riscv/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_gpio/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_pm/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_mm/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/spi_flash/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_system/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_system/app.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_common/common.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_common/soc.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_rom/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/hal/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/log/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/heap/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/soc/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_hw_support/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_hw_support/dma/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_hw_support/ldo/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/freertos/linker_common.lf;C:/Users/famil/esp/v5.4/esp-idf/components/freertos/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/newlib/newlib.lf;C:/Users/famil/esp/v5.4/esp-idf/components/newlib/system_libs.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_gptimer/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_ringbuf/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_uart/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/app_trace/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_event/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_pcnt/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_spi/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_mcpwm/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_ana_cmpr/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_dac/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_rmt/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_sdm/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_i2c/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_ledc/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_parlio/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_usb_serial_jtag/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/driver/twai/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_phy/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/vfs/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/lwip/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_netif/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/wpa_supplicant/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_coex/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_wifi/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_adc/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_driver_isp/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_eth/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_gdbstub/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_psram/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/esp_lcd/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/espcoredump/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/ieee802154/linker.lf;C:/Users/famil/esp/v5.4/esp-idf/components/openthread/linker.lf --input "C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/esp-idf/esp_system/ld/sections.ld.in" --output "C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/esp-idf/esp_system/ld/sections.ld" --kconfig C:/Users/famil/esp/v5.4/esp-idf/Kconfig --env-file "C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/config.env" --libraries-file "C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/ldgen_libraries" --objdump C:/Users/famil/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump.exe || (set FAIL_LINE=3& goto :ABORT)
+goto :EOF
+
+:ABORT
+set ERROR_CODE=%ERRORLEVEL%
+echo Batch file failed at line %FAIL_LINE% with errorcode %ERRORLEVEL%
+exit /b %ERROR_CODE%

Servo Sweep/build/esp-idf/esp_system/cmake_install.cmake

@@ -0,0 +1,44 @@
+# Install script for directory: C:/Users/famil/esp/v5.4/esp-idf/components/esp_system
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)/Servo")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set path to fallback-tool for dependency-resolution.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "C:/Users/famil/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for the subdirectory.
+  include("C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/esp-idf/esp_system/port/cmake_install.cmake")
+endif()
+

Servo Sweep/build/esp-idf/esp_system/ld/linker_script_generator.cmake

@@ -0,0 +1,9 @@
+execute_process(COMMAND "${CC}" "-C" "-P" "-x" "c" "-E" "-I" "${CONFIG_DIR}" "-I" "${LD_DIR}" "${SOURCE}"
+                RESULT_VARIABLE RET_CODE
+                OUTPUT_VARIABLE PREPROCESSED_LINKER_SCRIPT
+                ERROR_VARIABLE ERROR_VAR)
+if(RET_CODE AND NOT RET_CODE EQUAL 0)
+    message(FATAL_ERROR "Can't generate ${TARGET}\nRET_CODE: ${RET_CODE}\nERROR_MESSAGE: ${ERROR_VAR}")
+endif()
+string(REPLACE "\\n" "\n" TEXT "${PREPROCESSED_LINKER_SCRIPT}")
+file(WRITE "${TARGET}" "${TEXT}")

Servo Sweep/build/esp-idf/esp_system/ld/memory.ld

@@ -0,0 +1,146 @@
+/*
+
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+
+ *
+
+ * SPDX-License-Identifier: Apache-2.0
+
+ */
+/**
+
+ *                    ESP32-C6 Linker Script Memory Layout
+
+ * This file describes the memory layout (memory blocks) by virtual memory addresses.
+
+ * This linker script is passed through the C preprocessor to include configuration options.
+
+ * Please use preprocessor features sparingly!
+
+ * Restrict to simple macros with numeric values, and/or #if/#endif blocks.
+
+ */
+/*
+
+ * Automatically generated file. DO NOT EDIT.
+
+ * Espressif IoT Development Framework (ESP-IDF) 5.4.0 Configuration Header
+
+ */
+       
+/* List of deprecated options */
+/*
+
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+
+ *
+
+ * SPDX-License-Identifier: Apache-2.0
+
+ */
+/* CPU instruction prefetch padding size for flash mmap scenario */
+/*
+
+ * PMP region granularity size
+
+ * Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
+
+ * to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
+
+ * the PMP granularity is 2^G+2 bytes.
+
+ */
+/* CPU instruction prefetch padding size for memory protection scenario */
+/* Memory alignment size for PMS */
+    /* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
+/*
+
+ * IDRAM0_2_SEG_SIZE_DEFAULT is used when page size is 64KB
+
+ */
+MEMORY
+{
+  /**
+
+   *  All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
+
+   *  of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
+
+   *  are connected to the data port of the CPU and eg allow byte-wise access.
+
+   */
+  /* Flash mapped instruction data */
+  irom_seg (RX) : org = 0x42000020, len = (0x8000 << 8) - 0x20
+  /**
+
+   * (0x20 offset above is a convenience for the app binary image generation.
+
+   * Flash cache has 64KB pages. The .bin file which is flashed to the chip
+
+   * has a 0x18 byte file header, and each segment has a 0x08 byte segment
+
+   * header. Setting this offset makes it simple to meet the flash cache MMU's
+
+   * constraint that (paddr % 64KB == vaddr % 64KB).)
+
+   */
+  /**
+
+   * Shared data RAM, excluding memory reserved for ROM bss/data/stack.
+
+   * Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
+
+   */
+  sram_seg (RWX) : org = 0x40800000, len = 0x4086E610 - 0x40800000
+  /* Flash mapped constant data */
+  drom_seg (R) : org = 0x42000020, len = (0x8000 << 8) - 0x20
+  /* (See irom_seg for meaning of 0x20 offset in the above.) */
+  /**
+
+   * lp ram memory (RWX). Persists over deep sleep. // TODO: IDF-5667
+
+   */
+  lp_ram_seg(RW) : org = 0x50000000, len = 0x4000 - (0 + (24))
+  /* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
+
+     It reserves the amount of LP memory that we use for this memory segment.
+
+     This segment is intended for keeping:
+
+       - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
+
+       - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
+
+     The aim of this is to keep data that will not be moved around and have a fixed address.
+
+  */
+  lp_reserved_seg(RW) : org = 0x50000000 + 0x4000 - (0 + (24)), len = (0 + (24))
+}
+/* Heap ends at top of sram_seg */
+_heap_end = 0x40000000;
+_data_seg_org = ORIGIN(rtc_data_seg);
+/**
+
+ *  The lines below define location alias for .rtc.data section
+
+ *  C6 has no distinguished LP(RTC) fast and slow memory sections, instead, there is a unified LP_RAM section
+
+ *  Thus, the following region segments are not configurable like on other targets
+
+ */
+REGION_ALIAS("rtc_iram_seg", lp_ram_seg );
+REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
+REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
+REGION_ALIAS("rtc_data_location", rtc_iram_seg );
+REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
+  REGION_ALIAS("default_code_seg", irom_seg);
+  REGION_ALIAS("default_rodata_seg", drom_seg);
+/**
+
+ *  If rodata default segment is placed in `drom_seg`, then flash's first rodata section must
+
+ *  also be first in the segment.
+
+ */
+  ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
+         ".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")

Servo Sweep/build/esp-idf/esp_system/ld/sections.ld.in

@@ -0,0 +1,566 @@
+/*
+
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+
+ *
+
+ * SPDX-License-Identifier: Apache-2.0
+
+ */
+/*
+
+ * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+
+ *
+
+ * SPDX-License-Identifier: Apache-2.0
+
+ */
+/*
+
+ * Automatically generated file. DO NOT EDIT.
+
+ * Espressif IoT Development Framework (ESP-IDF) 5.4.0 Configuration Header
+
+ */
+       
+/* List of deprecated options */
+/* CPU instruction prefetch padding size for flash mmap scenario */
+/*
+
+ * PMP region granularity size
+
+ * Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
+
+ * to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
+
+ * the PMP granularity is 2^G+2 bytes.
+
+ */
+/* CPU instruction prefetch padding size for memory protection scenario */
+/* Memory alignment size for PMS */
+    /* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
+/* Default entry point */
+ENTRY(call_start_cpu0);
+SECTIONS
+{
+  /**
+
+   * RTC fast memory holds RTC wake stub code,
+
+   * including from any source file named rtc_wake_stub*.c
+
+   */
+  .rtc.text :
+  {
+    /* Align the start of RTC code region as per PMP granularity
+
+     * this ensures we do not overwrite the permissions for the previous
+
+     * region (ULP mem) regardless of its end alignment
+
+     */
+    
+ . = ALIGN(4); 
+ _rtc_fast_start = ABSOLUTE(.);
+    
+ . = ALIGN(4); 
+ _rtc_text_start = ABSOLUTE(.);
+    *(.rtc.entry.text)
+    mapping[rtc_text]
+    *rtc_wake_stub*.*(.text .text.*)
+    *(.rtc_text_end_test)
+    /* Align the end of RTC code region as per PMP granularity */
+    . = ALIGN(4);
+    _rtc_text_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /**
+
+   * This section located in RTC FAST Memory area.
+
+   * It holds data marked with RTC_FAST_ATTR attribute.
+
+   * See the file "esp_attr.h" for more information.
+
+   */
+  .rtc.force_fast :
+  {
+    
+ . = ALIGN(4); 
+ _rtc_force_fast_start = ABSOLUTE(.);
+    mapping[rtc_force_fast]
+    *(.rtc.force_fast .rtc.force_fast.*)
+    
+ . = ALIGN(4); 
+ _rtc_force_fast_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /**
+
+   * RTC data section holds RTC wake stub
+
+   * data/rodata, including from any source file
+
+   * named rtc_wake_stub*.c and the data marked with
+
+   * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
+
+   */
+  .rtc.data :
+  {
+    _rtc_data_start = ABSOLUTE(.);
+    mapping[rtc_data]
+    *rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .srodata.*)
+    _rtc_data_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.*(.bss .bss.* .sbss .sbss.*)
+    *rtc_wake_stub*.*(COMMON)
+    mapping[rtc_bss]
+    _rtc_bss_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /**
+
+   * This section holds data that should not be initialized at power up
+
+   * and will be retained during deep sleep.
+
+   * User data marked with RTC_NOINIT_ATTR will be placed
+
+   * into this section. See the file "esp_attr.h" for more information.
+
+   */
+  .rtc_noinit (NOLOAD):
+  {
+    
+ . = ALIGN(4); 
+ _rtc_noinit_start = ABSOLUTE(.);
+    *(.rtc_noinit .rtc_noinit.*)
+    
+ . = ALIGN(4); 
+ _rtc_noinit_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /**
+
+   * This section located in RTC SLOW Memory area.
+
+   * It holds data marked with RTC_SLOW_ATTR attribute.
+
+   * See the file "esp_attr.h" for more information.
+
+   */
+  .rtc.force_slow :
+  {
+    
+ . = ALIGN(4); 
+ _rtc_force_slow_start = ABSOLUTE(.);
+    *(.rtc.force_slow .rtc.force_slow.*)
+    
+ . = ALIGN(4); 
+ _rtc_force_slow_end = ABSOLUTE(.);
+  } > lp_ram_seg
+  /**
+
+   * This section holds RTC data that should have fixed addresses.
+
+   * The data are not initialized at power-up and are retained during deep
+
+   * sleep.
+
+   */
+  .rtc_reserved (NOLOAD):
+  {
+    
+ . = ALIGN(4); 
+ _rtc_reserved_start = ABSOLUTE(.);
+    /**
+
+     * New data can only be added here to ensure existing data are not moved.
+
+     * Because data have adhered to the end of the segment and code is relied
+
+     * on it.
+
+     * >> put new data here <<
+
+     */
+    *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
+    KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
+    _rtc_reserved_end = ABSOLUTE(.);
+  } > rtc_reserved_seg
+  _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
+  ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
+          "RTC reserved segment data does not fit.")
+  /* Get size of rtc slow data based on rtc_data_location alias */
+  _rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_slow_end - _rtc_data_start)
+                        : (_rtc_force_slow_end - _rtc_force_slow_start);
+  _rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
+                        ? (_rtc_force_fast_end - _rtc_fast_start)
+                        : (_rtc_noinit_end - _rtc_fast_start);
+  ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
+          "RTC_SLOW segment data does not fit.")
+  ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
+          "RTC_FAST segment data does not fit.")
+  .iram0.text :
+  {
+    _iram_start = ABSOLUTE(.);
+    /* Vectors go to start of IRAM */
+    ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
+    KEEP(*(.exception_vectors_table.text));
+    KEEP(*(.exception_vectors.text));
+    
+ . = ALIGN(4); 
+ _invalid_pc_placeholder = ABSOLUTE(.);
+    /* Code marked as running out of IRAM */
+    _iram_text_start = ABSOLUTE(.);
+    mapping[iram0_text]
+  } > sram_seg
+  /* Marks the end of IRAM code segment */
+  .iram0.text_end (NOLOAD) :
+  {
+    /* Align the end of code region as per PMP region granularity */
+    . = ALIGN(4);
+    
+ . = ALIGN(4); 
+ _iram_text_end = ABSOLUTE(.);
+  } > sram_seg
+  .iram0.data :
+  {
+    
+ . = ALIGN(16); 
+ _iram_data_start = ABSOLUTE(.);
+    mapping[iram0_data]
+    _iram_data_end = ABSOLUTE(.);
+  } > sram_seg
+  .iram0.bss (NOLOAD) :
+  {
+    
+ . = ALIGN(16); 
+ _iram_bss_start = ABSOLUTE(.);
+    mapping[iram0_bss]
+    _iram_bss_end = ABSOLUTE(.);
+    
+ . = ALIGN(16); 
+ _iram_end = ABSOLUTE(.);
+  } > sram_seg
+  .dram0.data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    __global_pointer$ = . + 0x800;
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    mapping[dram0_data]
+    _data_end = ABSOLUTE(.);
+  } > sram_seg
+  /**
+
+   * This section holds data that should not be initialized at power up.
+
+   * The section located in Internal SRAM memory region. The macro _NOINIT
+
+   * can be used as attribute to place data into this section.
+
+   * See the "esp_attr.h" file for more information.
+
+   */
+  .noinit (NOLOAD):
+  {
+    
+ . = ALIGN(4); 
+ _noinit_start = ABSOLUTE(.);
+    *(.noinit .noinit.*)
+    
+ . = ALIGN(4); 
+ _noinit_end = ABSOLUTE(.);
+  } > sram_seg
+  /* Shared RAM */
+  .dram0.bss (NOLOAD) :
+  {
+    
+ . = ALIGN(8); 
+ _bss_start = ABSOLUTE(.);
+    /**
+
+     * ldgen places all bss-related data to mapping[dram0_bss]
+
+     * (See components/esp_system/app.lf).
+
+     */
+    mapping[dram0_bss]
+    
+ . = ALIGN(8); 
+ _bss_end = ABSOLUTE(.);
+  } > sram_seg
+  .flash.text :
+  {
+    _stext = .;
+    /**
+
+     * Mark the start of flash.text.
+
+     * This can be used by the MMU driver to maintain the virtual address.
+
+     */
+    _instruction_reserved_start = ABSOLUTE(.);
+    _text_start = ABSOLUTE(.);
+    mapping[flash_text]
+    *(.stub)
+    *(.gnu.linkonce.t.*)
+    *(.gnu.warning)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    /**
+
+     * CPU will try to prefetch up to 16 bytes of of instructions.
+
+     * This means that any configuration (e.g. MMU, PMS) must allow
+
+     * safe access to up to 16 bytes after the last real instruction, add
+
+     * dummy bytes to ensure this
+
+     */
+    . += 16;
+    _text_end = ABSOLUTE(.);
+    /**
+
+     * Mark the flash.text end.
+
+     * This can be used for MMU driver to maintain virtual address.
+
+     */
+    _instruction_reserved_end = ABSOLUTE(.);
+    _etext = .;
+    /**
+
+     * Similar to _iram_start, this symbol goes here so it is
+
+     * resolved by addr2line in preference to the first symbol in
+
+     * the flash.text segment.
+
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > default_code_seg
+  /**
+
+   * Dummy section represents the .flash.text section but in default_rodata_seg.
+
+   * Thus, it must have its alignment and (at least) its size.
+
+   */
+  .flash_rodata_dummy (NOLOAD):
+  {
+    _flash_rodata_dummy_start = .;
+    . = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text);
+    /* Add alignment of MMU page size + 0x20 bytes for the mapping header. */
+    . = ALIGN(0x8000) + 0x20;
+  } > default_rodata_seg
+  .flash.appdesc : ALIGN(0x10)
+  {
+    /**
+
+     * Mark flash.rodata start.
+
+     * This can be used for mmu driver to maintain virtual address
+
+     */
+    _rodata_reserved_start = ABSOLUTE(.);
+    _rodata_start = ABSOLUTE(.);
+    /* !DO NOT PUT ANYTHING BEFORE THIS! */
+    /* Should be the first.  App version info. */
+    *(.rodata_desc .rodata_desc.*)
+    /* Should be the second. Custom app version info. */
+    *(.rodata_custom_desc .rodata_custom_desc.*)
+    /**
+
+     * Create an empty gap within this section. Thanks to this, the end of this
+
+     * section will match .flash.rodata's begin address. Thus, both sections
+
+     * will be merged when creating the final bin image.
+
+     */
+    . = ALIGN(ALIGNOF(.flash.rodata));
+  } > default_rodata_seg
+  ASSERT((ADDR(.flash.rodata) == ADDR(.flash.appdesc) + SIZEOF(.flash.appdesc)), "The gap between .flash.appdesc and .flash.rodata must not exist to produce the final bin image.")
+  .flash.rodata : ALIGN(0x10)
+  {
+    _flash_rodata_start = ABSOLUTE(.);
+    mapping[flash_rodata]
+    *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    *(.gcc_except_table .gcc_except_table.*)
+    *(.gnu.linkonce.e.*)
+    /**
+
+     * C++ constructor tables.
+
+     *
+
+     * Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
+
+     *
+
+     * RISC-V gcc is configured with --enable-initfini-array so it emits
+
+     * .init_array section instead. But the init_priority sections will be
+
+     * sorted for iteration in ascending order during startup.
+
+     * The rest of the init_array sections is sorted for iteration in descending
+
+     * order during startup, however. Hence a different section is generated for
+
+     * the init_priority functions which is iterated in ascending order during
+
+     * startup. The corresponding code can be found in startup.c.
+
+     */
+    
+ . = ALIGN(4); 
+ __init_priority_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
+    __init_priority_array_end = ABSOLUTE(.);
+    
+ . = ALIGN(4); 
+ __init_array_start = ABSOLUTE(.);
+    KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
+    __init_array_end = ABSOLUTE(.);
+    /* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
+    
+ . = ALIGN(4); 
+ soc_reserved_memory_region_start = ABSOLUTE(.);
+    KEEP (*(.reserved_memory_address))
+    soc_reserved_memory_region_end = ABSOLUTE(.);
+    /* System init functions registered via ESP_SYSTEM_INIT_FN */
+    
+ . = ALIGN(4); 
+ _esp_system_init_fn_array_start = ABSOLUTE(.);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
+    _esp_system_init_fn_array_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+    . = ALIGN(ALIGNOF(.eh_frame_hdr));
+  } > default_rodata_seg
+  ASSERT((ADDR(.eh_frame_hdr) == ADDR(.flash.rodata) + SIZEOF(.flash.rodata)), "The gap between .flash.rodata and .eh_frame_hdr must not exist to produce the final bin image.")
+  .eh_frame_hdr :
+  {
+    . = ALIGN(ALIGNOF(.eh_frame));
+  } > default_rodata_seg
+  ASSERT((ADDR(.eh_frame) == ADDR(.eh_frame_hdr) + SIZEOF(.eh_frame_hdr)), "The gap between .eh_frame_hdr and .eh_frame must not exist to produce the final bin image.")
+  .eh_frame :
+  {
+    . = ALIGN(ALIGNOF(.flash.tdata));
+  } > default_rodata_seg
+  ASSERT((ADDR(.flash.tdata) == ADDR(.eh_frame) + SIZEOF(.eh_frame)), "The gap between .eh_frame and .flash.tdata must not exist to produce the final bin image.")
+  .flash.tdata :
+  {
+    _thread_local_data_start = ABSOLUTE(.);
+    *(.tdata .tdata.* .gnu.linkonce.td.*)
+    . = ALIGN(ALIGNOF(.flash.tbss));
+    _thread_local_data_end = ABSOLUTE(.);
+  } > default_rodata_seg
+  ASSERT((ADDR(.flash.tbss) == ADDR(.flash.tdata) + SIZEOF(.flash.tdata)), "The gap between .flash.tdata and .flash.tbss must not exist to produce the final bin image.")
+  .flash.tbss (NOLOAD) :
+  {
+    _thread_local_bss_start = ABSOLUTE(.);
+    *(.tbss .tbss.* .gnu.linkonce.tb.*)
+    *(.tcommon .tcommon.*)
+    _thread_local_bss_end = ABSOLUTE(.);
+  } > default_rodata_seg
+  /**
+
+   * This section contains all the rodata that is not used
+
+   * at runtime, helping to avoid an increase in binary size.
+
+   */
+  .flash.rodata_noload (NOLOAD) :
+  {
+    /**
+
+     * This symbol marks the end of flash.rodata. It can be utilized by the MMU
+
+     * driver to maintain the virtual address.
+
+     * NOLOAD rodata may not be included in this section.
+
+     */
+    _rodata_reserved_end = ADDR(.flash.tbss);
+    mapping[rodata_noload]
+  } > default_rodata_seg
+  /* Marks the end of data, bss and possibly rodata */
+  .dram0.heap_start (NOLOAD) :
+  {
+    
+ . = ALIGN(16); 
+ _heap_start = ABSOLUTE(.);
+  } > sram_seg
+  /* DWARF 1 */
+  .debug 0 : { *(.debug) }
+  .line 0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo 0 : { *(.debug_srcinfo) }
+  .debug_sfnames 0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges 0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev 0 : { *(.debug_abbrev) }
+  .debug_line 0 : { *(.debug_line) }
+  .debug_frame 0 : { *(.debug_frame) }
+  .debug_str 0 : { *(.debug_str) }
+  .debug_loc 0 : { *(.debug_loc) }
+  .debug_macinfo 0 : { *(.debug_macinfo) }
+  .debug_pubtypes 0 : { *(.debug_pubtypes) }
+  /* DWARF 3 */
+  .debug_ranges 0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames 0 : { *(.debug_varnames) }
+  /* GNU DWARF 2 extensions */
+  .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
+  .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
+  /* DWARF 4 */
+  .debug_types 0 : { *(.debug_types) }
+  /* DWARF 5 */
+  .debug_addr 0 : { *(.debug_addr) }
+  .debug_line_str 0 : { *(.debug_line_str) }
+  .debug_loclists 0 : { *(.debug_loclists) }
+  .debug_macro 0 : { *(.debug_macro) }
+  .debug_names 0 : { *(.debug_names) }
+  .debug_rnglists 0 : { *(.debug_rnglists) }
+  .debug_str_offsets 0 : { *(.debug_str_offsets) }
+  .comment 0 : { *(.comment) }
+  .note.GNU-stack 0: { *(.note.GNU-stack) }
+  .riscv.attributes 0: { *(.riscv.attributes) }
+  /DISCARD/ :
+  {
+   /**
+
+    * Discarding .rela.* sections results in the following mapping:
+
+    * .rela.text.* -> .text.*
+
+    * .rela.data.* -> .data.*
+
+    * And so forth...
+
+    */
+   *(.rela.*)
+   *(.got .got.plt) /* TODO: GCC-382 */
+   *(.eh_frame_hdr)
+   *(.eh_frame)
+  }
+}

Servo Sweep/build/esp-idf/esp_system/port/cmake_install.cmake

@@ -0,0 +1,44 @@
+# Install script for directory: C:/Users/famil/esp/v5.4/esp-idf/components/esp_system/port
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)/Servo")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set path to fallback-tool for dependency-resolution.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "C:/Users/famil/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for the subdirectory.
+  include("C:/Users/famil/COMPUTER/Owen/ESPmicrocontroller/Servo Sweep/build/esp-idf/esp_system/port/soc/esp32c6/cmake_install.cmake")
+endif()
+

Servo Sweep/build/esp-idf/esp_system/port/soc/esp32c6/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: C:/Users/famil/esp/v5.4/esp-idf/components/esp_system/port/soc/esp32c6
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)/Servo")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set path to fallback-tool for dependency-resolution.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "C:/Users/famil/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump.exe")
+endif()
+